EECE 5649 — Design of Analog Integrated Circuits with Complementary Metal-Oxide-Semiconductor Technology
4 semester hoursGraduateLecturetypical days: T/FBostonTraditional
Covers theoretical analysis, practical design, and simulation of analog integrated circuits implemented in complementary metal-oxide-semiconductor (CMOS) fabrication process technologies. Introduces cadence tools for circuit simulations, physical layout, and layout verification. Begins with basic concepts such as CMOS device models, DC and small-signal analysis techniques for single- and multistage amplifiers, biasing configurations, and reference generation circuits. Explores differential signal processing, operational amplifiers, operational transconductance amplifiers, and common-mode feedback circuits. Analysis methods include the evaluation of linearity, noise, stability, and device mismatches from process variations. Addresses some advanced design techniques, such as linearity improvement methods, frequency compensation, and digitally assisted performance tuning.
Prerequisites
- one of:
- EECE 3410 (min D-)
- graduate program admission
Offering history
| Term | Sections | Enrolled | Capacity | Full | Open seats/section |
|---|---|---|---|---|---|
| Spring 2025 | 1 | 17 | 28 | 61% | 11.0 |
Snapshots from scheduled scrapes — not live seat availability. "Full" can exceed 100% when sections over-enroll.
Meeting times
Share of recent sections by weekday: M 0% · T 100% · W 0% · Th 0% · F 100%
Common patterns: TF (100% of sections) — in patterns, R means Thursday
Professors
Spring
- Marvin Onabajo (100% of students) · reviews
Percentages are each professor's average share of the season's enrolled students in recent terms.
Unlocks
EECE 7242, EECE 7247, EECE 7250
Courses that list EECE 5649 in their prerequisites.
Links
Official catalog (EECE course descriptions) · Student reviews on RateMyHusky · All EECE courses · Plan it at numap.app